Embodiments of the present invention relate to a data verification device, and more particularly to a data verification device for verifying input data, a data input/output (I/O) path and an operation of a sense amplifier in a test mode.
Generally, when a user desires to input data to a memory device, the data is input to a memory cell array by passing through a data I/O path and a write driver. In verifying the data input to the memory cell array, the data is read out by passing through a sense amplifier and the data I/O path.
However, if, for instance, a new memory device is developed, it may be difficult to guarantee reliability of a data I/O path, a sense amplifier, and/or a memory cell array of the new memory device. In this case, if data is input to the memory device and the input data is then read out from the memory device, a user or a verifier may have difficulty in recognizing whether or not the read-out data is the desired data. That is, to verify the correctness of the data written in the memory device, the reliability of the data I/O path, the sense amplifier, and the memory cell array, which are included in the new memory device, should be guaranteed in advance. However, it takes a long time to verify data written in the memory device using conventional memory verification if the reliability of the data I/O path, the sense amplifier, and the memory cell array has not already been guaranteed.